• Generate control/address data from 800 MT/s to 1600 MT/s in 4 MHz increments
• 640 vectors per patterns at all frequencies 
• External low jitter clock input 
• SSC support 
• Power supply margining on Vtt, Vdd, and Vref nodes
• Customizable GUI platform developed with Python
• Custom patterns with easy-to-use editors
• Control data skew within 10 ps increments
• Access to DDR3 Register control word space

Measurement Capabilities

• Single-bit and SSO delay testing
• Parity functionality test
• GND Vdd-bounce due to SSO
• Signal integrity, ISI, Crosstalk
• IDD
• Tdynoff
• Tsu / Th
• Propagation delay
• Output slew rate (dV/dT)
• Clock output jitter (Tcc, Tper, Thper)
• Total / Fractional clock output skew (Tcksk)
• Stabilization time (Tstab)
• Qn to clock tolerance - ½ and ¾ pre-launch
• Pulse duration on CK (Tcl / Tch)

Description

Inphi's DDR3 Clock Reference Board (CRB) creates a customizable stand-alone environment where the user can test and validate DDR3 Registered DIMMs.  The CRB is a major leap forward in DDR3 register testing by allowing performance up to and beyond DDR3 1600 or 800 MHz clock frequency.  Users are given the flexibility to customize the user interface and patterns.  Full source codes and example GPIB interface modules are provided to give the user freedom to fully automate their testing procedures.

The CRB hardware requires a PC running the Inphi CRB Python interface.  Power can be supplied by either an ATX-compatible supply or lower noise ±5 V bench supply.  The device under test (DUT) is mounted on DDR3 RDIMM connectors and test points are provided on board for a monitor using a high-speed oscilloscope.

For more information about ExacTik® or other Inphi products, please click here and enter your email address for product downloads.  New users, must first complete our product request form.

Back to ExacTik® Memory Interface